Solving Systems of Linear Equations over GF(2) on FPGAs Public
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The focus and scope of this project are to reduce the computational complexity and time complexity required to find solutions to large systems of linear equations with binary coefficients and to implement this reduced method on FPGA hardware. Beginning with a simple exhaustive search to check all possible solutions against every equation in the system, continuous research and calculation resulted in various iterations of a reduced search algorithm. Each version attempted to take advantage of inherent patterns in the input system, or of mathematical principles that arise when working with systems with binary coefficients. The resulting algorithm is the combination of Gaussian Elimination and Partial exhaustive search algorithm with sub-exponential complexity. The provided algorithm makes use of counting 1s coefficients to recursively find portions of valid solutions for each equation in the system and combines those portions to generate full solutions to the system. The C implementation of the final RecursiveSearch() function can be found in the Appendices, as well as the C implementations of the ExhaustiveSearch() function and the failed search attempts.
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