Device Utilization Summary | [-] |
Slice Logic Utilization | Used | Available | Utilization | Note(s) |
Number of Slice Registers |
130 |
595,200 |
1% |
|
Number used as Flip Flops |
130 |
|
|
|
Number used as Latches |
0 |
|
|
|
Number used as Latch-thrus |
0 |
|
|
|
Number used as AND/OR logics |
0 |
|
|
|
Number of Slice LUTs |
141 |
297,600 |
1% |
|
Number used as logic |
128 |
297,600 |
1% |
|
Number using O6 output only |
106 |
|
|
|
Number using O5 output only |
1 |
|
|
|
Number using O5 and O6 |
21 |
|
|
|
Number used as ROM |
0 |
|
|
|
Number used as Memory |
0 |
122,240 |
0% |
|
Number used exclusively as route-thrus |
13 |
|
|
|
Number with same-slice register load |
13 |
|
|
|
Number with same-slice carry load |
0 |
|
|
|
Number with other load |
0 |
|
|
|
Number of occupied Slices |
54 |
74,400 |
1% |
|
Number of LUT Flip Flop pairs used |
147 |
|
|
|
Number with an unused Flip Flop |
30 |
147 |
20% |
|
Number with an unused LUT |
6 |
147 |
4% |
|
Number of fully used LUT-FF pairs |
111 |
147 |
75% |
|
Number of unique control sets |
6 |
|
|
|
Number of slice register sites lost to control set restrictions |
14 |
595,200 |
1% |
|
Number of bonded IOBs |
52 |
840 |
6% |
|
IOB Flip Flops |
17 |
|
|
|
Number of RAM36E1/FIFO36E1s |
16 |
1,064 |
1% |
|
Number using RAMB36E1 only |
16 |
|
|
|
Number using FIFO36E1 only |
0 |
|
|
|
Number of RAMB18E1/FIFO18E1s |
0 |
2,128 |
0% |
|
Number of BUFG/BUFGCTRLs |
2 |
32 |
6% |
|
Number used as BUFGs |
2 |
|
|
|
Number used as BUFGCTRLs |
0 |
|
|
|
Number of BUFHs |
0 |
216 |
0% |
|
Number of IDELAYCTRLs |
0 |
27 |
0% |
|
Number of BSCANs |
0 |
4 |
0% |
|
Number of BUFOs |
0 |
54 |
0% |
|
Number of BUFIODQSs |
0 |
108 |
0% |
|
Number of BUFRs |
0 |
54 |
0% |
|
Number of CAPTUREs |
0 |
1 |
0% |
|
Number of MMCM_ADVs |
0 |
18 |
0% |
|
Number of DSP48E1s |
4 |
2,016 |
1% |
|
Number of EFUSE_USRs |
0 |
1 |
0% |
|
Number of GTXE1s |
0 |
36 |
0% |
|
Number of ICAPs |
0 |
2 |
0% |
|
Number of ISERDESE1s |
0 |
|
|
|
Number of OSERDESE1s |
0 |
|
|
|
Number of IODELAYE1s |
0 |
1,080 |
0% |
|
Number of PCIE_2_0s |
0 |
2 |
0% |
|
Number of ILOGICE1s |
0 |
1,080 |
0% |
|
Number of OLOGICE1s |
17 |
1,080 |
1% |
|
Number of PLL_ADVs |
0 |
|
|
|
Number of PPC440s |
0 |
|
|
|
Number of STARTUPs |
0 |
1 |
0% |
|
Number of SYSMONs |
0 |
1 |
0% |
|
Number of TEMAC_SINGLEs |
0 |
4 |
0% |
|
Average Fanout of Non-Clock Nets |
2.94 |
|
|
|