By using reconfigurable hardware, the algorithmic flexibility of software can be combined with the high-speed of dedicated hardware. To demonstrate this, a reconfigurable computing card that interfaces to a PC via the ISA bus was designed, implemented, and tested. Three separate algorithms were developed using VHDL. Software was created to measure to algorithms' performance running on the reconfigurable hardware as compared to equivalent software routines executing on the PC. Significant performance advantages were observed, demonstrating the prominent capabilities of reconfigurable computing.

• This report represents the work of one or more WPI undergraduate students submitted to the faculty as evidence of completion of a degree requirement. WPI routinely publishes these reports on its website without editorial or peer review.

Creator

• Vidal, Matthew Stephen
• Ondrasek, Michael John
• Fichera, Edward Paul
• Roberts, William C.
• Kocima, Michael John
• Drew, Jason Michael

Publisher

• Worcester Polytechnic Institute

Identifier

• 99D132M

Advisor

• Looft, Fred J.

Year

• 1999

Date created

• 1999-01-01

Resource type

• Major Qualifying Project

Major

• Electrical Engineering

Rights statement

• In Copyright