While unknown to most people, hardware implementation attacks provide a serious adversary for systems that contain sensitive data. Mission critical information can be extracted from a design with little effort from an attacker when they have access to the physical hardware. Thus designers try to mitigate this problem by using unique countermeasures styles. This work presents the first practical differential power analysis security evaluation of a countermeasure style called t-private logic. A PRESENT block cipher S-Box was implemented on a Virtex 5 FPGA as a reference platform. Both hardware and simulated power traces were collected. Statistical analyses were performed (CPA and Correlation enhanced collision attack) and our results revealed a first-order side channel attack vulnerability.

• This report represents the work of one or more WPI undergraduate students submitted to the faculty as evidence of completion of a degree requirement. WPI routinely publishes these reports on its website without editorial or peer review.

Creator

• LaJeunesse, Nicholas Peter
• Goddard, Zachary Nels

Publisher

• Worcester Polytechnic Institute

Identifier

• E-project-111014-134640

Advisor

• Eisenbarth, Thomas

Year

• 2014

Center

• MITRE-Bedford, Massachusetts Project Center - MQP

Sponsor

• The MITRE Corporation

Date created

• 2014-11-10

Location

• New Bedford

Resource type

• Major Qualifying Project

Major

• Electrical & Computer Engineering

Rights statement

• In Copyright