Student Work
Modeling the Instantaneous Power Consumption of an FPGA
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open in viewerThe power consumption of an FPGA’s routing network dominates the instantaneous power consumption of the device. A model for the routing network would therefore be useful for simulating the instantaneous power of the device. The goal of this project is to develop such a model, relating the power consumption of the routing network to the length of each net. This model will be integrated with power simulation tools in the Power Side-Channel Attack Risk Evaluator (PSCARE) to give a more accurate power simulation for FPGAs. Preliminary testing on the model shows that it can correctly simulate a modified PSCARE power simulation.
- This report represents the work of one or more WPI undergraduate students submitted to the faculty as evidence of completion of a degree requirement. WPI routinely publishes these reports on its website without editorial or peer review.
- Creator
- Publisher
- Identifier
- E-project-012716-093804
- Advisor
- Year
- 2015
- Center
- Sponsor
- Date created
- 2015-01-27
- Localização
- New Bedford
- Resource type
- Major
- Rights statement
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Permanent link to this page: https://digital.wpi.edu/show/8623j0223