Student Work
Cryptographic coprocessor with algorithm agility
PublicCryptographic algorithm agility, i.e., the capability to switch between several encryption algorithms, has become a desirable feature due to the algorithm-independent design paradigm of modern security protocols. This MQP describes the design and implementation of an algorithm-agile cryptographic co-processor board. The core of the board is an FPGA, which can be dynamically configured with a variety of block ciphers. The FPGA is capable of data encryption at high speeds through an ISA bus interface. The board contains a Ram with an algorithm library, i.e., a collection of FPGA configuration files. The library can be updated during operation.
- This report represents the work of one or more WPI undergraduate students submitted to the faculty as evidence of completion of a degree requirement. WPI routinely publishes these reports on its website without editorial or peer review.
- Creator
- Publisher
- Identifier
- 99C033M
- Advisor
- Year
- 1999
- Date created
- 1999-01-01
- Resource type
- Major
- Rights statement
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