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Filtering by: Publisher Worcester Polytechnic Institute Sponsor sim Analog Devices Inc

Keyword:: Jitter, Clock Generation, Delay Line, Delay-Locked Loop, and Interleaved ADC
Creator:: Gong, Jianping
Advisor:: McNeill, John A.
Publisher:: Worcester Polytechnic Institute
Date Created:: 2019-08-08
Resource Type:: Dissertation
Degree:: PhD
Unit (Department):: Electrical & Computer Engineering

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