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Filtro per: Parola chiave hardware accelerator

FPGA-Based Co-processor for Singular Value Array Reconciliation Tomography

Parola chiave:

hardware accelerator, FPGA, digital signal processing, and SVD

Creatore:

Coyne, Jack W

Advisor:

Duckworth, R. James

Editore:

Worcester Polytechnic Institute

data di creazione:

2007-09-05

Resource Type:

Thesis

Degree:

MS

Unit (Department):

Electrical & Computer Engineering