Index Catalog // Digital WPI

Start Over

Filtering by: Keyword cross-core

Implicit Cache Lockdown on ARM: An Accidental Countermeasure to Cache-Timing Attacks

Keyword:

cache-timing, cross-core, cache, ARM, Security, Countermeasure, lockdown, and side-channel

Creator:

Green, Marc

Advisor:

Eisenbarth, Thomas

Publisher:

Worcester Polytechnic Institute

Date Created:

2017-01-20

Resource Type:

Thesis

Degree:

MS

Unit (Department):

Computer Science