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Filtrado por: Palabra clave Hardware Optimization Collections Masters Theses

1. A Reinforcement Learning Approach To Optimize the MLC Prefetcher Aggressiveness at Run-Time

Palabra clave:: Computer Architecture, Mid-Level Cache Prefetchers, Run-Time Performance Tuning, Q-learning, Reinforcement Learning, and Hardware Optimization
Creador:: Adiletta, Matthew J.
Advisor:: Sunar, Berk, Shue, Craig A., and Doroz, Yarkin
Editor:: Worcester Polytechnic Institute
Fecha de Creacion:: 2021-05-06
Resource Type:: Thesis
Degree:: MS
Unit (Department):: Electrical & Computer Engineering