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Adiletta, Matthew J.
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A Reinforcement Learning Approach To Optimize the MLC Prefetcher Aggressiveness at Run-Time
Keyword:
Computer Architecture
,
Mid-Level Cache Prefetchers
,
Run-Time Performance Tuning
,
Q-learning
,
Reinforcement Learning
, and
Hardware Optimization
Creator:
Adiletta, Matthew J.
Advisor:
Sunar, Berk
,
Shue, Craig A.
, and
Doroz, Yarkin
Publisher:
Worcester Polytechnic Institute
Date Created:
2021-05-06
Resource Type:
Thesis
Degree:
MS
Unit (Department):
Electrical & Computer Engineering
Prefetcher Optimization
Keyword:
Performance
,
Q-learning
,
Cache Memory
,
Reinforcement Learning
,
Optimization
, and
Cache Prefetching
Creator:
Adiletta, Matthew J.
Advisor:
Sunar, Berk
and
Shue, Craig A.
Publisher:
Worcester Polytechnic Institute
Date Created:
2020-12-07
Resource Type:
Major Qualifying Project
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Creator
Adiletta, Matthew J.
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Doroz, Yarkin
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Shue, Craig A.
2
Sunar, Berk
2
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Doroz, Yarkin
1
Shue, Craig A.
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Sunar, Berk
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Electrical & Computer Engineering
1
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Electrical & Computer Engineering
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Worcester Polytechnic Institute
2
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Computing
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