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Coln, Michael
Remove constraint Contributor: Coln, Michael
Creator
Gong, Jianping
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Sub-Picosecond Jitter Clock Generation for Time Interleaved Analog to Digital Converter
Keyword:
Jitter
,
Clock Generation
,
Delay Line
,
Delay-Locked Loop
, and
Interleaved ADC
Creator:
Gong, Jianping
Advisor:
McNeill, John A.
Publisher:
Worcester Polytechnic Institute
Date Created:
2019-08-08
Resource Type:
Dissertation
Degree:
PhD
Unit (Department):
Electrical & Computer Engineering
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PhD Dissertations
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Year
2019
1
Creator
Gong, Jianping
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1
Advisor
McNeill, John A.
1
Contributor
Coln, Michael
[remove]
1
Guler, Ulkuhan
1
McNeill, John A.
1
Unit (Department)
Electrical & Computer Engineering
1
Publisher
Worcester Polytechnic Institute
1
Resource type
Dissertation
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