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Eisenbarth, Thomas
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Threshold Implementations of the Present Cipher
Side-Channel Attacks on Intel SGX: How SGX Amplifies The Power of Cache Attack
Efficient Side-channel Resistant MPC-based Software Implementation of the AES
Implicit Cache Lockdown on ARM: An Accidental Countermeasure to Cache-Timing Attacks
Lightweight Cryptography Meets Threshold Implementation: A Case Study for SIMON
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Creator
Farmani, Mohammad
1
Fernandez Rubio, Abraham
1
Green, Marc
1
Moghimi, Ahmad
1
Shahverdi, Aria
1
Advisor
Eisenbarth, Thomas
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5
Contributor
Eisenbarth, Thomas
5
Huang, Xinming
1
Sunar, Berk
2
Taha, Mostafa
1
Wyglinski, Alexander
1
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Computer Science
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Electrical & Computer Engineering
3
Publisher
Worcester Polytechnic Institute
5
Resource type
Thesis
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